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IP Core Á¦Ç° > Terrestrial > DVB-T DVB-H modulator
 

DVB-T/DVB-H modulator

Product code: CMS0009

The proliferation of low-cost DVB-T/DVB-H demodulation and set-top-box products has opened up a wealth of opportunities for applications requiring low-cost broadband wireless audio/video/data links. Commodity products have largely been aimed at the broadcast market where the high volumes are at the demodulation end of the link. The Commsonic DVB-T Modulator allows exploitation of this technology by allowing the development of the modulator in low-cost FPGA or ASIC implementation. Applications include CCTV, wireless home networking, test equipment, etc.
This core is intended to provide a very efficient FPGA or ASIC implementation of all functions required to take the output from an MPEG-2 transport multiplexer and modulate it according to ETSI EN300 744 v1.5.1. The specification is fully supported for 2K, 4K and 8K COFDM modes as well as hierarchical transport streams. The standard output is a baseband I/Q digital pair for direct connection to a DAC. Alternative output configurations include a low IF or direct connection to standard Analog Devices Direct Digital Synthesizers (e.g. AD9857).
Every effort has been made to keep the size of the block to an absolute minimum in order to target the low-cost FPGA families, however this has not been at the expense of functionality. Synthesis directives are used wherever possible to remove a block within the design has functionality that may not be required for all applications.

Also see:



DVB-T/DVB-H demodulator
General purpose FFT core


Block diagram


Click on diagram to enlarge

Safari Plug-in

Click on image for further information


Downloads

Release note
Technical data brief, 1st December 2008 (404 kB)
IP Guide, 1st December 2008 (970 kB)
Altera megacore, v1.4.5 (40.70 MB)
Safari Plug-in, v1.18 (6.71 MB)

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Certification





Standards compliance

ETSI EN300 744 v1.5.1

Features

  • RS and convolutional encoding.
  • Native and indepth interleaving.
  • QPSK, QAM-16 and QAM-64 support.
  • Hierarchical support.
  • 2k,4k and 8k FFT.
  • FFT guard interval insertion.
  • Optional FFT output windowing.
  • Optional critical-mask output filter.
  • Variable 5-8MHz bandwidth interpolation.
  • External AD9857 DDS interface.
  • Automatic AD9857 programming.
  • Multi-channel AD9857 applications.
  • Optional internal IF conversion.
  • Optional in-band pre-distortion.

    Implementation

  • Single external clock source
  • Optimised for Xilinx and Altera
  • Evaluation boards available.

    Plug-ins / Extensions

  • ASI/SPI interface with TS PCR rate adaptation.
  • DVB-T(H) feature-set extensions.
  • SFN synchronisation adaptor.
  •